什么是模块化，怎么写一个好的C语言模块？通过标准库，开源库，驱动库学习_c语言模块化#ifndef LED.h #def


**2.“.h”文件中不可以定义变量** 在.h中只能声明，不能定义

#ifndef LED.h #define LED.h

extern a; //声明变量a 正确 b=3; //定义变量b 错误

#endif


**3声明变量不会占用内存，定义变量才会**


定义变量和声明变量的区别在于定义会产生分配内存的操作，这是汇编阶段的概念；声明则只是告诉包含该声明的模块在连接阶段从其他模块寻找外部函数和变量。


4 **不想让外界知道的信息，就不应该出现在头文件里，而想让外部调用的函数或变量，则一定要在头文件中声明**


**5 头文件(.h)命名应与源文件(.c)一致，便于清晰的查看各个头文件**


6 #include <stdio.h>,#include “myfile.h”,双引号先在工程目录里寻找，再去系统目录里寻找。


**.c文件(XX.c)注意事项：**


1.**模块内不想被外部引用的函数和全局变量需在“.c”文件头冠以static关键字声明。** 这样这些函数和变量只会在当前.c文件中起到作用\*\*，\*\*一来可以避免函数名的重复；二来可以保护内部的实现数据，防止被破坏

static a = 3; static void LED_Open();


2模块中想要被其他文件访问的变量，一定要是全局变量，并且在.h中声明


3 **要尽量减少全局变量的使用**，因为全局变量的生命周期是从程序的开始到程序的结束的，这意味着你在其他源文件中调用这个变量时，可能会产生同名变量，以及变量数值错误等问题


4函数的声明有无extern都行，变量的声明必须加上extern，否则编译器无法识别声明。


**extern static 关键字用法** 请参看 [【c语言】关键字存储类型讲解(auto,extern,static,register,const)]( )


转载于：<https://blog.csdn.net/as480133937/article/details/93400979>




---



### 外设库，硬件库，驱动库


#### stm32f10x\_gpio.h

/** ****************************************************************************** * @file stm32f10x_gpio.h * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief This file contains all the functions prototypes for the GPIO * firmware library. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * *

© COPYRIGHT 2011 STMicroelectronics

****************************************************************************** */

/* Define to prevent recursive inclusion -------------------------------------*/ #ifndef __STM32F10x_GPIO_H #define __STM32F10x_GPIO_H

#ifdef __cplusplus extern "C" { #endif

/* Includes ------------------------------------------------------------------*/ #include "stm32f10x.h"

/** @addtogroup STM32F10x_StdPeriph_Driver * @{ */

/** @addtogroup GPIO * @{ */

/** @defgroup GPIO_Exported_Types * @{ */

#define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) ||
((PERIPH) == GPIOB) ||
((PERIPH) == GPIOC) ||
((PERIPH) == GPIOD) ||
((PERIPH) == GPIOE) ||
((PERIPH) == GPIOF) ||
((PERIPH) == GPIOG))

/** * @brief Output Maximum frequency selection */

typedef enum { GPIO_Speed_10MHz = 1, GPIO_Speed_2MHz, GPIO_Speed_50MHz }GPIOSpeed_TypeDef; #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) ||
((SPEED) == GPIO_Speed_50MHz))

/** * @brief Configuration Mode enumeration */

typedef enum { GPIO_Mode_AIN = 0x0, GPIO_Mode_IN_FLOATING = 0x04, GPIO_Mode_IPD = 0x28, GPIO_Mode_IPU = 0x48, GPIO_Mode_Out_OD = 0x14, GPIO_Mode_Out_PP = 0x10, GPIO_Mode_AF_OD = 0x1C, GPIO_Mode_AF_PP = 0x18 }GPIOMode_TypeDef;

#define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) ||
((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) ||
((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) ||
((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))

/** * @brief GPIO Init structure definition */

typedef struct { uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured. This parameter can be any value of @ref GPIO_pins_define */

GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins. This parameter can be a value of @ref GPIOSpeed_TypeDef */

GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins. This parameter can be a value of @ref GPIOMode_TypeDef */ }GPIO_InitTypeDef;

/** * @brief Bit_SET and Bit_RESET enumeration */

typedef enum { Bit_RESET = 0, Bit_SET }BitAction;

#define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))

/** * @} */

/** @defgroup GPIO_Exported_Constants * @{ */

/** @defgroup GPIO_pins_define * @{ */

#define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */ #define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */ #define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */ #define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */ #define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */ #define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */ #define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */ #define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */ #define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */ #define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */ #define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */ #define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */ #define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */ #define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */ #define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */ #define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */ #define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */

#define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))

#define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) ||
((PIN) == GPIO_Pin_1) ||
((PIN) == GPIO_Pin_2) ||
((PIN) == GPIO_Pin_3) ||
((PIN) == GPIO_Pin_4) ||
((PIN) == GPIO_Pin_5) ||
((PIN) == GPIO_Pin_6) ||
((PIN) == GPIO_Pin_7) ||
((PIN) == GPIO_Pin_8) ||
((PIN) == GPIO_Pin_9) ||
((PIN) == GPIO_Pin_10) ||
((PIN) == GPIO_Pin_11) ||
((PIN) == GPIO_Pin_12) ||
((PIN) == GPIO_Pin_13) ||
((PIN) == GPIO_Pin_14) ||
((PIN) == GPIO_Pin_15))

/** * @} */

/** @defgroup GPIO_Remap_define * @{ */

#define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */ #define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */ #define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */ #define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */ #define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */ #define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */ #define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */ #define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */ #define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */ #define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */ #define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */ #define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */ #define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */ #define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */ #define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */ #define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */ #define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */ #define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */ #define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */ #define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */ #define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */ #define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */ #define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */ #define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */ #define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */ #define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */ #define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */ #define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */ #define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices) */ #define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */

#define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */ #define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */ #define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */ #define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */ #define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */

#define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */ #define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */ #define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */ #define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */ #define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */ #define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */

#define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */ #define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */ #define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, only for High density Value line devices) */

#define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) ||
((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) ||
((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) ||
((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) ||
((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) ||
((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) ||
((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) ||
((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) ||
((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) ||
((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) ||
((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) ||
((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) ||
((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) ||
((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) ||
((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) ||
((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) ||
((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) ||
((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) ||
((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) ||
((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) ||
((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) ||
((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC))

/** * @} */

/** @defgroup GPIO_Port_Sources * @{ */

#define GPIO_PortSourceGPIOA ((uint8_t)0x00) #define GPIO_PortSourceGPIOB ((uint8_t)0x01) #define GPIO_PortSourceGPIOC ((uint8_t)0x02) #define GPIO_PortSourceGPIOD ((uint8_t)0x03) #define GPIO_PortSourceGPIOE ((uint8_t)0x04) #define GPIO_PortSourceGPIOF ((uint8_t)0x05) #define GPIO_PortSourceGPIOG ((uint8_t)0x06) #define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) ||
((PORTSOURCE) == GPIO_PortSourceGPIOB) ||
((PORTSOURCE) == GPIO_PortSourceGPIOC) ||
((PORTSOURCE) == GPIO_PortSourceGPIOD) ||
((PORTSOURCE) == GPIO_PortSourceGPIOE))

#define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) ||
((PORTSOURCE) == GPIO_PortSourceGPIOB) ||
((PORTSOURCE) == GPIO_PortSourceGPIOC) ||
((PORTSOURCE) == GPIO_PortSourceGPIOD) ||
((PORTSOURCE) == GPIO_PortSourceGPIOE) ||
((PORTSOURCE) == GPIO_PortSourceGPIOF) ||
((PORTSOURCE) == GPIO_PortSourceGPIOG))

/** * @} */

/** @defgroup GPIO_Pin_sources * @{ */

#define GPIO_PinSource0 ((uint8_t)0x00) #define GPIO_PinSource1 ((uint8_t)0x01) #define GPIO_PinSource2 ((uint8_t)0x02) #define GPIO_PinSource3 ((uint8_t)0x03) #define GPIO_PinSource4 ((uint8_t)0x04) #define GPIO_PinSource5 ((uint8_t)0x05) #define GPIO_PinSource6 ((uint8_t)0x06) #define GPIO_PinSource7 ((uint8_t)0x07) #define GPIO_PinSource8 ((uint8_t)0x08) #define GPIO_PinSource9 ((uint8_t)0x09) #define GPIO_PinSource10 ((uint8_t)0x0A) #define GPIO_PinSource11 ((uint8_t)0x0B) #define GPIO_PinSource12 ((uint8_t)0x0C) #define GPIO_PinSource13 ((uint8_t)0x0D) #define GPIO_PinSource14 ((uint8_t)0x0E) #define GPIO_PinSource15 ((uint8_t)0x0F)

#define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) ||
((PINSOURCE) == GPIO_PinSource1) ||
((PINSOURCE) == GPIO_PinSource2) ||
((PINSOURCE) == GPIO_PinSource3) ||
((PINSOURCE) == GPIO_PinSource4) ||
((PINSOURCE) == GPIO_PinSource5) ||
((PINSOURCE) == GPIO_PinSource6) ||
((PINSOURCE) == GPIO_PinSource7) ||
((PINSOURCE) == GPIO_PinSource8) ||
((PINSOURCE) == GPIO_PinSource9) ||
((PINSOURCE) == GPIO_PinSource10) ||
((PINSOURCE) == GPIO_PinSource11) ||
((PINSOURCE) == GPIO_PinSource12) ||
((PINSOURCE) == GPIO_PinSource13) ||
((PINSOURCE) == GPIO_PinSource14) ||
((PINSOURCE) == GPIO_PinSource15))

/** * @} */

/** @defgroup Ethernet_Media_Interface * @{ */ #define GPIO_ETH_MediaInterface_MII ((u32)0x00000000) #define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001)

#define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) ||
((INTERFACE) == GPIO_ETH_MediaInterface_RMII))

/** * @} */
/** * @} */

/** @defgroup GPIO_Exported_Macros * @{ */

/** * @} */

/** @defgroup GPIO_Exported_Functions * @{ */

void GPIO_DeInit(GPIO_TypeDef* GPIOx); void GPIO_AFIODeInit(void); void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct); void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct); uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx); uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal); void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal); void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); void GPIO_EventOutputCmd(FunctionalState NewState); void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState); void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource); void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface);

#ifdef __cplusplus } #endif

#endif /* __STM32F10x_GPIO_H */ /** * @} */

/** * @} */


#### stm32f10x\_gpio.c

/** ****************************************************************************** * @file stm32f10x_gpio.c * @author MCD Application Team * @version V3.5.0 * @date 11-March-2011 * @brief This file provides all the GPIO firmware functions. ****************************************************************************** * @attention * * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. * *

© COPYRIGHT 2011 STMicroelectronics

****************************************************************************** */

/* Includes ------------------------------------------------------------------*/ #include "stm32f10x_gpio.h" #include "stm32f10x_rcc.h"

/** @addtogroup STM32F10x_StdPeriph_Driver * @{ */

/** @defgroup GPIO * @brief GPIO driver modules * @{ */

/** @defgroup GPIO_Private_TypesDefinitions * @{ */

/** * @} */

/** @defgroup GPIO_Private_Defines * @{ */

/* ------------ RCC registers bit address in the alias region ----------------*/ #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)

/* --- EVENTCR Register -----*/

/* Alias word address of EVOE bit */ #define EVCR_OFFSET (AFIO_OFFSET + 0x00) #define EVOE_BitNumber ((uint8_t)0x07) #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))

/* --- MAPR Register ---*/ /* Alias word address of MII_RMII_SEL bit */ #define MAPR_OFFSET (AFIO_OFFSET + 0x04) #define MII_RMII_SEL_BitNumber ((u8)0x17) #define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))

#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80) #define LSB_MASK ((uint16_t)0xFFFF) #define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000) #define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF) #define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000) #define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000) /** * @} */

/** @defgroup GPIO_Private_Macros * @{ */

/** * @} */

/** @defgroup GPIO_Private_Variables * @{ */

/** * @} */

/** @defgroup GPIO_Private_FunctionPrototypes * @{ */

/** * @} */

/** @defgroup GPIO_Private_Functions * @{ */

/** * @brief Deinitializes the GPIOx peripheral registers to their default reset values. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @retval None */ void GPIO_DeInit(GPIO_TypeDef* GPIOx) { /* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx));

if (GPIOx == GPIOA) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE); } else if (GPIOx == GPIOB) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE); } else if (GPIOx == GPIOC) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE); } else if (GPIOx == GPIOD) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE); }
else if (GPIOx == GPIOE) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE); } else if (GPIOx == GPIOF) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE); } else { if (GPIOx == GPIOG) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE); } } }

/** * @brief Deinitializes the Alternate Functions (remap, event control * and EXTI configuration) registers to their default reset values. * @param None * @retval None */ void GPIO_AFIODeInit(void) { RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE); RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE); }

/** * @brief Initializes the GPIOx peripheral according to the specified * parameters in the GPIO_InitStruct. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that * contains the configuration information for the specified GPIO peripheral. * @retval None */ void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct) { uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00; uint32_t tmpreg = 0x00, pinmask = 0x00; /* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));

/*---------------------------- GPIO Mode Configuration -----------------------*/ currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F); if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00) { /* Check the parameters */ assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed)); /* Output mode */ currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed; } /*---------------------------- GPIO CRL Configuration ------------------------*/ /* Configure the eight low port pins */ if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00) { tmpreg = GPIOx->CRL; for (pinpos = 0x00; pinpos < 0x08; pinpos++) { pos = ((uint32_t)0x01) << pinpos; /* Get the port pins position */ currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; if (currentpin == pos) { pos = pinpos << 2; /* Clear the corresponding low control register bits */ pinmask = ((uint32_t)0x0F) << pos; tmpreg &= ~pinmask; /* Write the mode configuration in the corresponding bits */ tmpreg |= (currentmode << pos); /* Reset the corresponding ODR bit */ if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) { GPIOx->BRR = (((uint32_t)0x01) << pinpos); } else { /* Set the corresponding ODR bit */ if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) { GPIOx->BSRR = (((uint32_t)0x01) << pinpos); } } } } GPIOx->CRL = tmpreg; } /*---------------------------- GPIO CRH Configuration ------------------------*/ /* Configure the eight high port pins */ if (GPIO_InitStruct->GPIO_Pin > 0x00FF) { tmpreg = GPIOx->CRH; for (pinpos = 0x00; pinpos < 0x08; pinpos++) { pos = (((uint32_t)0x01) << (pinpos + 0x08)); /* Get the port pins position */ currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos); if (currentpin == pos) { pos = pinpos << 2; /* Clear the corresponding high control register bits */ pinmask = ((uint32_t)0x0F) << pos; tmpreg &= ~pinmask; /* Write the mode configuration in the corresponding bits */ tmpreg |= (currentmode << pos); /* Reset the corresponding ODR bit */ if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD) { GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08)); } /* Set the corresponding ODR bit */ if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU) { GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08)); } } } GPIOx->CRH = tmpreg; } }

/** * @brief Fills each GPIO_InitStruct member with its default value. * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will * be initialized. * @retval None */ void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct) { /* Reset GPIO init structure parameters values */ GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING; }

/** * @brief Reads the specified input port pin. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_Pin_x where x can be (0..15). * @retval The input port pin value. */ uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { uint8_t bitstatus = 0x00;

/* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); assert_param(IS_GET_GPIO_PIN(GPIO_Pin));

if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET) { bitstatus = (uint8_t)Bit_SET; } else { bitstatus = (uint8_t)Bit_RESET; } return bitstatus; }

/** * @brief Reads the specified GPIO input data port. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @retval GPIO input data port value. */ uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx) { /* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx));

return ((uint16_t)GPIOx->IDR); }

/** * @brief Reads the specified output data port bit. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @param GPIO_Pin: specifies the port bit to read. * This parameter can be GPIO_Pin_x where x can be (0..15). * @retval The output port pin value. */ uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { uint8_t bitstatus = 0x00; /* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); assert_param(IS_GET_GPIO_PIN(GPIO_Pin));

if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET) { bitstatus = (uint8_t)Bit_SET; } else { bitstatus = (uint8_t)Bit_RESET; } return bitstatus; }

/** * @brief Reads the specified GPIO output data port. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @retval GPIO output data port value. */ uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx) { /* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx));

return ((uint16_t)GPIOx->ODR); }

/** * @brief Sets the selected data port bits. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @param GPIO_Pin: specifies the port bits to be written. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). * @retval None */ void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Pin));

GPIOx->BSRR = GPIO_Pin; }

/** * @brief Clears the selected data port bits. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @param GPIO_Pin: specifies the port bits to be written. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). * @retval None */ void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { /* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Pin));

GPIOx->BRR = GPIO_Pin; }

/** * @brief Sets or clears the selected data port bit. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @param GPIO_Pin: specifies the port bit to be written. * This parameter can be one of GPIO_Pin_x where x can be (0..15). * @param BitVal: specifies the value to be written to the selected bit. * This parameter can be one of the BitAction enum values: * @arg Bit_RESET: to clear the port pin * @arg Bit_SET: to set the port pin * @retval None */ void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal) { /* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_BIT_ACTION(BitVal));

if (BitVal != Bit_RESET) { GPIOx->BSRR = GPIO_Pin; } else { GPIOx->BRR = GPIO_Pin; } }

/** * @brief Writes data to the specified GPIO data port. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @param PortVal: specifies the value to be written to the port output data register. * @retval None */ void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal) { /* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx));

GPIOx->ODR = PortVal; }

/** * @brief Locks GPIO Pins configuration registers. * @param GPIOx: where x can be (A..G) to select the GPIO peripheral. * @param GPIO_Pin: specifies the port bit to be written. * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). * @retval None */ void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { uint32_t tmp = 0x00010000;

/* Check the parameters */ assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Pin));

tmp |= GPIO_Pin; /* Set LCKK bit */ GPIOx->LCKR = tmp; /* Reset LCKK bit */ GPIOx->LCKR = GPIO_Pin; /* Set LCKK bit */ GPIOx->LCKR = tmp; /* Read LCKK bit*/ tmp = GPIOx->LCKR; /* Read LCKK bit*/ tmp = GPIOx->LCKR; }

/** * @brief Selects the GPIO pin used as Event output. * @param GPIO_PortSource: selects the GPIO port to be used as source * for Event output. * This parameter can be GPIO_PortSourceGPIOx where x can be (A..E). * @param GPIO_PinSource: specifies the pin for the Event output. * This parameter can be GPIO_PinSourcex where x can be (0..15). * @retval None */ void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) { uint32_t tmpreg = 0x00; /* Check the parameters */ assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource)); assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));

tmpreg = AFIO->EVCR; /* Clear the PORT[6:4] and PIN[3:0] bits */ tmpreg &= EVCR_PORTPINCONFIG_MASK; tmpreg |= (uint32_t)GPIO_PortSource << 0x04; tmpreg |= GPIO_PinSource; AFIO->EVCR = tmpreg; }

/** * @brief Enables or disables the Event Output. * @param NewState: new state of the Event output. * This parameter can be: ENABLE or DISABLE. * @retval None */ void GPIO_EventOutputCmd(FunctionalState NewState) { /* Check the parameters */ assert_param(IS_FUNCTIONAL_STATE(NewState));

*(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState; }

/** * @brief Changes the mapping of the specified pin. * @param GPIO_Remap: selects the pin to remap. * This parameter can be one of the following values: * @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping * @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping * @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping * @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping * @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping * @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping * @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping * @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping * @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping * @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping * @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping * @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping * @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping * @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping * @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping * @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping * @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping * @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration * @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping * @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping * @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping * @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping * @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices) * @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices) * @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST * @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled * @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP) * @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) * When the SPI3/I2S3 is remapped using this function, the SWJ is configured * to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST. * @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected * to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices) * If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to * Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output. * @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) * @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices) * @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices) * @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices) * @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices) * @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices) * @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices) * @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices) * @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices) * @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) * @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) * @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) * @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) * @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices) * @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, * only for High density Value line devices) * @param NewState: new state of the port pin remapping. * This parameter can be: ENABLE or DISABLE. * @retval None */ void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState) { uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;

/* Check the parameters */ assert_param(IS_GPIO_REMAP(GPIO_Remap)); assert_param(IS_FUNCTIONAL_STATE(NewState));

if((GPIO_Remap & 0x80000000) == 0x80000000) { tmpreg = AFIO->MAPR2; } else { tmpreg = AFIO->MAPR; }

tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10; tmp = GPIO_Remap & LSB_MASK;

if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) { tmpreg &= DBGAFR_SWJCFG_MASK; AFIO->MAPR &= DBGAFR_SWJCFG_MASK; } else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK) { tmp1 = ((uint32_t)0x03) << tmpmask; tmpreg &= ~tmp1; tmpreg |= ~DBGAFR_SWJCFG_MASK; } else { tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10)); tmpreg |= ~DBGAFR_SWJCFG_MASK; }

if (NewState != DISABLE) { tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10)); }

if((GPIO_Remap & 0x80000000) == 0x80000000) { AFIO->MAPR2 = tmpreg; } else { AFIO->MAPR = tmpreg; }
}

/** * @brief Selects the GPIO pin used as EXTI Line. * @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines. * This parameter can be GPIO_PortSourceGPIOx where x can be (A..G). * @param GPIO_PinSource: specifies the EXTI line to be configured. * This parameter can be GPIO_PinSourcex where x can be (0..15). * @retval None */ void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource) { uint32_t tmp = 0x00; /* Check the parameters */ assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource)); assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));

tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)); AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp; AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03))); }

/** * @brief Selects the Ethernet media interface. * @note This function applies only to STM32 Connectivity line devices. * @param GPIO_ETH_MediaInterface: specifies the Media Interface mode. * This parameter can be one of the following values: * @arg GPIO_ETH_MediaInterface_MII: MII mode * @arg GPIO_ETH_MediaInterface_RMII: RMII mode * @retval None */ void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface) { assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));

/* Configure MII_RMII selection bit */ *(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface; }

/** * @} */


### 开源库，软件库，组件库


环形缓冲库ring buffer：<https://blog.csdn.net/qq_41854911/article/details/119299737>


#### lwrb.h

/** * \file lwrb.h * \brief LwRB - Lightweight ring buffer */

/* * Copyright (c) 2020 Tilen MAJERLE * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without restriction, * including without limitation the rights to use, copy, modify, merge, * publish, distribute, sublicense, and/or sell copies of the Software, * and to permit persons to whom the Software is furnished to do so, * subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE * AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * This file is part of LwRB - Lightweight ring buffer library. * * Author: Tilen MAJERLE tilen@majerle.eu * Version: v2.0.1 */ #ifndef LWRB_HDR_H #define LWRB_HDR_H

#include <string.h> #include <stdint.h>

#ifdef __cplusplus extern "C" { #endif /* __cplusplus */

/** * \defgroup LWRB Lightweight ring buffer manager * \brief Lightweight ring buffer manager * { */

/** * \brief Enable buffer structure pointer parameter as volatile * To use this feature, uncomment keyword below */ #define LWRB_VOLATILE /* volatile */

/** * \brief Adds 2 magic words to make sure if memory is corrupted * application can detect wrong data pointer and maximum size */ #define LWRB_USE_MAGIC 1

/** * \brief Event type for buffer operations */ typedef enum { LWRB_EVT_READ, /*!< Read event */ LWRB_EVT_WRITE, /*!< Write event */ LWRB_EVT_RESET, /*!< Reset event */ } lwrb_evt_type_t;

/** * \brief Buffer structure forward declaration */ struct lwrb;

/** * \brief Event callback function type * \param[in] buff: Buffer handle for event * \param[in] evt: Event type * \param[in] bp: Number of bytes written or read (when used), depends on event type */ typedef void (*lwrb_evt_fn)(LWRB_VOLATILE struct lwrb* buff, lwrb_evt_type_t evt, size_t bp);

/** * \brief Buffer structure */ typedef struct lwrb { #if LWRB_USE_MAGIC uint32_t magic1; /*!< Magic 1 word */ #endif /* LWRB_USE_MAGIC */ uint8_t* buff; /*!< Pointer to buffer data. Buffer is considered initialized when buff != NULL and size > 0 */ size_t size; /*!< Size of buffer data. Size of actual buffer is 1 byte less than value holds */ size_t r; /*!< Next read pointer. Buffer is considered empty when r == w and full when w == r - 1 */ size_t w; /*!< Next write pointer. Buffer is considered empty when r == w and full when w == r - 1 */ lwrb_evt_fn evt_fn; /*!< Pointer to event callback function */ #if LWRB_USE_MAGIC uint32_t magic2; /*!< Magic 2 word */ #endif /* LWRB_USE_MAGIC */ } lwrb_t;

uint8_t lwrb_init(LWRB_VOLATILE lwrb_t* buff, void* buffdata, size_t size); uint8_t lwrb_is_ready(LWRB_VOLATILE lwrb_t* buff); void lwrb_free(LWRB_VOLATILE lwrb_t* buff); void lwrb_reset(LWRB_VOLATILE lwrb_t* buff); void lwrb_set_evt_fn(LWRB_VOLATILE lwrb_t* buff, lwrb_evt_fn fn);

/* Read/Write functions */ size_t lwrb_write(LWRB_VOLATILE lwrb_t* buff, const void* data, size_t btw); size_t lwrb_read(LWRB_VOLATILE lwrb_t* buff, void* data, size_t btr); size_t lwrb_peek(LWRB_VOLATILE lwrb_t* buff, size_t skip_count, void* data, size_t btp);

/* Buffer size information */ size_t lwrb_get_free(LWRB_VOLATILE lwrb_t* buff); size_t lwrb_get_full(LWRB_VOLATILE lwrb_t* buff);

/* Read data block management */ void* lwrb_get_linear_block_read_address(LWRB_VOLATILE lwrb_t* buff); size_t lwrb_get_linear_block_read_length(LWRB_VOLATILE lwrb_t* buff); size_t lwrb_skip(LWRB_VOLATILE lwrb_t* buff, size_t len);

/* Write data block management */ void* lwrb_get_linear_block_write_address(LWRB_VOLATILE lwrb_t* buff); size_t lwrb_get_linear_block_write_length(LWRB_VOLATILE lwrb_t* buff); size_t lwrb_advance(LWRB_VOLATILE lwrb_t* buff, size_t len);

/** * } */

#ifdef __cplusplus } #endif /* __cplusplus */

#endif /* LWRB_HDR_H */


#### lwrb.c

/** * \file lwrb.c * \brief Lightweight ring buffer */

/* Memory set and copy functions */ #define BUF_MEMSET memset #define BUF_MEMCPY memcpy

#define BUF_MAGIC1 (0xDEADBEEF) #define BUF_MAGIC2 (~0xDEADBEEF)

#if LWRB_USE_MAGIC #define BUF_IS_VALID(b) ((b) != NULL && (b)->magic1 == BUF_MAGIC1 && (b)->magic2 == BUF_MAGIC2 && (b)->buff != NULL && (b)->size > 0) #else #define BUF_IS_VALID(b) ((b) != NULL && (b)->buff != NULL && (b)->size > 0) #endif /* LWRB_USE_MAGIC */ #define BUF_MIN(x, y) ((x) < (y) ? (x) : (y)) #define BUF_MAX(x, y) ((x) > (y) ? (x) : (y)) #define BUF_SEND_EVT(b, type, bp) do { if ((b)->evt_fn != NULL) { (b)->evt_fn((b), (type), (bp)); } } while (0)

/** * \brief Initialize buffer handle to default values with size and buffer data array * \param[in] buff: Buffer handle * \param[in] buffdata: Pointer to memory to use as buffer data * \param[in] size: Size of buffdata in units of bytes * Maximum number of bytes buffer can hold is size - 1 * \return 1 on success, 0 otherwise */ uint8_t lwrb_init(LWRB_VOLATILE lwrb_t* buff, void* buffdata, size_t size) { if (buff == NULL || buffdata == NULL || size == 0) { return 0; }

BUF\_MEMSET((void\*)buff, 0x00, sizeof(\*buff));

buff->size = size;
buff->buff = buffdata;

#if LWRB_USE_MAGIC buff->magic1 = BUF_MAGIC1; buff->magic2 = BUF_MAGIC2; #endif /* LWRB_USE_MAGIC */

return 1;

}

/** * \brief Check if buff is initialized and ready to use * \param[in] buff: Buffer handle * \return 1 if ready, 0 otherwise */ uint8_t lwrb_is_ready(LWRB_VOLATILE lwrb_t* buff) { return BUF_IS_VALID(buff); }

/** * \brief Free buffer memory * \note Since implementation does not use dynamic allocation, * it just sets buffer handle to NULL * \param[in] buff: Buffer handle */ void lwrb_free(LWRB_VOLATILE lwrb_t* buff) { if (BUF_IS_VALID(buff)) { buff->buff = NULL; } }

/** * \brief Set event function callback for different buffer operations * \param[in] buff: Buffer handle * \param[in] evt_fn: Callback function */ void lwrb_set_evt_fn(LWRB_VOLATILE lwrb_t* buff, lwrb_evt_fn evt_fn) { if (BUF_IS_VALID(buff)) { buff->evt_fn = evt_fn; } }

/** * \brief Write data to buffer. * Copies data from data array to buffer and marks buffer as full for maximum btw number of bytes * * \param[in] buff: Buffer handle * \param[in] data: Pointer to data to write into buffer * \param[in] btw: Number of bytes to write * \return Number of bytes written to buffer. * When returned value is less than btw, there was no enough memory available * to copy full data array */ size_t lwrb_write(LWRB_VOLATILE lwrb_t* buff, const void* data, size_t btw) { size_t tocopy, free; const uint8_t* d = data;

if (!BUF\_IS\_VALID(buff) || data == NULL || btw == 0) {
    return 0;
}

/\* Calculate maximum number of bytes available to write \*/
free = lwrb\_get\_free(buff);
btw = BUF\_MIN(free, btw);
if (btw == 0) {

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