Elbrus: from the past to the future
A series of supercomputers was released under the proud name "Elbrus", which was developed by the Soviet scientist Vsevolod Sergeyevich Burtsev (70-80's). These computers have introduced a number of innovations in the theory of computing machines, such as superscalarity (processing more than one instruction per clock cycle), the implementation of secure programming with hardware data types, parallel processing of multiple instructions. But the main feature of Soviet supercomputers was their orientation to high-level languages. Soviet-American scientist Vladimir Mstislavovich Pentkovsky, who participated in the development of Elbrus, created a high-level programming language El-76.
In addition to improving the sphere of Soviet computers, the computer became the basis for the creation of 64-bit universal microprocessors "Elbrus 4-S" and the next generation "Elbrus 8-S". They diluted the market of American manufacturers Intel, AMD and IBM. The local development and production of processors was driven by the need to find their own solutions for the defense industry, where the use of domestic devices is more desirable.
*Supercomputer "Elbrus"*
History of development
The development of the Elbrus computer architecture began in the 70s at ITMiVT. Lebedev. The developers were faced with the task of creating a computing system with a capacity of 100 million op/s. Burtsev was engaged in the computer control and design system and became the chief designer of the project.
- Vsevolod Sergeyevich Burtsev (1927 - 2005) was a Soviet academician, a scientist in the field of control systems and the theory of universal computer design, chief designer of the first Soviet supercomputers and computer complexes.
In 1980, "Elbrus-1" with a total capacity of 15 million op/s successfully passed state tests. It was the first computer in the Soviet Union built on the basis of TTL chips. A feature of the machine was a scalable architecture that supported the simultaneous operation of up to 10 processors. RAM reached 64 MB (220 machine words). The organization of data flow transmission between peripheral devices and RAM was carried out using special I/O processors. There could be about 4 similar processors in the system and they had their own memory, working in parallel with the central processor.
"Elbrus-1" was used in many military systems — missile defense, Space Control Center, etc.
The next stage in the development of the Elbrus computer was the transfer of the architecture of the first model to a new element base. Thus, the "Elbrus-2" arose, which was based on the basis of the ELS integrated circuits. Its productivity reached 125 million op/s. The amount of RAM has also increased — up to 144 MB. The clock frequency reached 20 MHz.
In 1985, the Elbrus-2 was put into serial production. It was used in areas where large calculations were required. The computer was also actively used in the defense industry, in the Space Flight Control Center and in nuclear research centers (in Arzamas-16, in Chelyabinsk-70). Since 1991, the computer has been working in the A-135 missile defense system and at other military facilities.
*Supercomputer "Elbrus-2"*
Together with supercomputers, a general-purpose computer "Elbrus 1-KB" (1988) was also produced. These machines replaced the BESM-6 with which they had full backward software compatibility. It was supplemented with a new mode of operation with an increased bit depth of numbers and addresses.
Comparative characteristics of BESM-6 and Elbrus 1-KB
| Characteristic | BESM-6 | "Elbrus 1-KB" |
|---|---|---|
| Productivity (million op/s) | ddd | dd |
| Frequency, MHz | 1 | 2,5 — 3 |
| Bit depth, bit | 10 | 20 |
| Bit depth of RAM addressing, bits | 15 | 15 |
| RAM capacity, MB | 0,032-0,128 | 0,77 |
| Disk storage capacity, MB | 116 | 58 |
| Occupied area, m2 | 150-200 | 250 |
| Power consumption, kW | 30 | 105 |
| Total released | 355 | 60 |
The next one was released "Elbrus-3", in which the developers implemented for the first time a "postsuperscalar" approach. This computer was developed from 1986 to 1994 by ITMiVT employees under the leadership of Soviet scientist Boris Artashesovich Babayan.
The Elbrus-3 was not put into mass production, but its architecture became the basis for the development of the Elbrus 2000 and Elbrus-3M1 microprocessors.
The Elbrus series was appreciated by the Soviet leadership. Developers Babayan, Burtsev, Bardizh received awards and orders. The rest of the participants were also awarded state prizes.
The era of MCST processors
The Russian company MCST was founded in 1992 on the basis of the team of developers "Elbrus-3". It became the legal successor of the Moscow Center of SPARC Technologies LLP (hence the name of the MCST). The abbreviation SPARC came from the main partner of the MCST, the American corporation Sun Microsystems, which promotes computers with the SPARC architecture.
MCST produced microprocessors with SPARC architecture (MCST-R100, MCST-R150, MCST-R500 and MCST-R500S) and based on them created computing systems. But in 2007, the processor of the same name "Elbrus" was released. The peak performance of the device in 64-bit mode reached 2.4 GFLOPS. The operating clock frequency was 300 MHz. There were 75.8 million transistors in the processor. Dissipated power of 6 watts.
Processor "Elbrus"
Based on the processor, the Elbrus-3M1 computing complex was developed, which was used for the defense industry. This complex was provided with a secure operating system MSVS-E (Mobile system of the Armed Forces), based on Linux version 2.6.14. "Elbrus-3M1" was backward compatible with the first and second "Elbrus".
The computing complex had two design options — server, which could be used as a desktop and in the execution of CompactPCI (system bus). The server version was based on the device of the UV 3M1 computer. In the case of CompactPCI, Elbrus-3M1 occupied two modules of the Euromechanics 6U format. The execution equipment of both variants was equipped with network equipment for ultra-high-speed exchanges with similar computing complexes.
In 2010, at the ChipEXPO-2010 and Softool exhibitions, the Elbrus-S chip-based system was presented to the public. The number of transistors in this processor has increased to 218 million. Also, the clock frequency has risen to 500 MHz and peak performance has increased: up to 4 GFLOPS in 64-bit and up to 8 GFLOPS in 32-bit modes.
Together with Elbrus-S, a peripheral interface controller (CPI) was introduced.
Processor "Elbrus-S"
In 2011, MCST presented the next-generation dual-core processor "Elbrus-2C+". In addition to the 2 main cores (Elbrus architecture) operating at a clock frequency of 500 MHz, the model had an additional 4 cores of an integrated digital signal processor (Multicore architecture). An input/output channel has been added to the processor, with which it is possible to connect another KPI. Also, "Elbrus-2C +" was supplemented by support for DDR2 memory with an effective frequency of 800 MHz. Processor performance has increased — up to 28 GFLOPS in 32-bit mode. The number of transistors has reached 368 million.
The developers have implemented a version of the C compiler in order to reproduce the code for DSP cores and establish effective interaction between the main program on CPU cores and actions on DSP.
According to the calculations of the creators, "Elbrus-2C +" was supposed to be used in digital intelligent signal processing systems (radars, image analyzers, etc.). But the processors turned out to be better adapted to civilian tasks. For example, Kraftway launched a test series of monoblock computers based on Elbrus-2C+ crystals.
Processor "Elbrus-2C+" Processor "Elbrus-4S"
In April 2014, the company introduced advanced quad-core processors "Elbrus-4S". Technical characteristics of "Elbrus-4S"
| Technological process | 65 nm |
|---|---|
| Number of architecture cores | 4 |
| Clock frequency | 800 MHz |
| Peak performance | 64 bits — 25 GFLOPS / 32 digits — 50 GFLOPS |
| Cache memory of Level 1 commands | 128 KB |
| Level 1 data cache | 64 КБ |
| Level 2 cache memory | 8 MB |
| Organization of RAM | Up to 3 channels DDR3-1600 ECC |
| Bandwidth of RAM channels | 38.4 GB/s |
| Power dissipation | Up to 60 Watts |
| Number of transistors | 986 million |
First of all, it is worth paying attention to the transition of processor production to a 65 nm technological process. The clock frequency and bandwidth of RAM channels have also increased. These and other improvements have significantly affected the performance growth of the new processors. Each core can perform up to 23 operations in one clock cycle. In floating-point operations, the peak theoretical performance of the four cores is about 50 GFLOPS of single precision and 25 GFLOPS of double precision. If we compare it with the previous model "Elbrus-2C+", then in 64-bit mode it is more than three times higher. In the new processor, a more complex crystal, which contains 986 million transistors, has a useful area of 380 mm2.
Processor "Elbrus-4S"
MCST specialists have created their own operating system "Elbrus" specifically for the released processor. The OS is based on the Linux kernel version 2.6.33. It consists of over 3000 software packages (from the Debian 5.0 distribution) and has a package manager. A full set of developer tools is included, including optimization compilers for high-level programming languages C, C++, Fortran-77 and Fortran-9.
OS "Elbrus" was certified according to the second class of protection against unauthorized access and the second level of control over undeclared capabilities. But computers based on Elbrus-4S processors also work with Windows OS versions.
Tandem processor and desktop computer
One of the company's projects was the development of the first Russian desktop computer based on the Elbrus-4S processor. It was named "ARM Elbrus-401" (where ARM stands for automated workplace). The model is designed for an office in the MiniTower standard building. But it can be used in different areas with increased requirements for information security.
The computer has a 65 nm process with a clock frequency of 800 Hz, SATA2 and USB 2.0 ports, a pre-installed 120 GB SSD with an mSATA interface and support for DDR3-1600 with ECC. The basic configuration offers 24 GB of RAM (expandable to 96 GB). Among the features of the ARM Elbrus-401 architecture, the following can be distinguished: the presence of 6 parallel channels of arithmetic logic devices; a register file of 256 84-bit registers; hardware support for cycles; support for speculative calculations and single-bit predicates; a command that can set up to 23 operations in one clock cycle with maximum filling. An AMD Radeon 6000 series graphics card is also installed in the computer.
Computer "ARM Elbrus-401"
Processor of the new generation — "Elbrus-8C"
The Elbrus-8C processor is being developed by the MCST company with the participation of the I.S. Brook Institute of Electronic Control Machines (INEUM). The architecture, circuitry and topology of the microprocessor were created by Russian specialists. The processor has eight cores with an improved 64-bit architecture "Elbrus". The clock frequency reaches 1.3 GHz, the amount of cache memory of the second and third levels is 4 and 16 MB. The estimated performance reaches 250 GFLOPS.
Technical characteristics of "Elbrus-8C"
| Technological process | 65 nm |
|---|---|
| Number of architecture cores | 8 |
| Clock frequency | 1.3 GHz |
| Peak performance | 64 bits — 125 GFLOPS / 32 digits — 250 GFLOPS |
| Level 2 cache memory | 512 KB |
| Level 3 Cache memory | 16 МБ |
| Number of memory controllers | 4 |
| Organization of RAM | DDR3-1600 ECC |
| Throughput of each interprocessor exchange channel | 8 GB/sec |
| Power dissipation | 60—90W |
| Crystal area | 350 mm2 |
The computer has its own architecture "Elbrus", which was developed in CJSC "MCST". Vector accelerators of command systems help to make encryption and signal processing faster.
The hardware interacts with the OS through its own BIOS microcode. The processor is compatible with Linux, FreeBSD, QNX, Windows XP distributions, but the recommended operating system "Elbrus" based on the Linux kernel 2.6.33. The use of specialized development tools (optimizing compilers from C and C++, Fortran, Java, etc.) makes it possible to optimize the program code taking into account the architecture of "Elbrus".
Processor "Elbrus-8C"
The company is already developing utility programs and auxiliary components optimized to work on processors. These are all tools for working with the network and peripheral devices (utilities, general—purpose libraries, services, database support, graphics subsystem).
"Elbrus-8C" should be paired with KPI 2 — a Russian-made peripheral interface controller.
The central processor "Elbrus-16C" / Release date 2021
The 1891VM038 CPU chip is a server—class computer with hardware support for virtualization and an extended address space of RAM. It contains 16 cores of the Elbrus architecture of the 6th generation with a clock frequency up to 2000 MHz and a built-in controller of peripheral interfaces of the 3rd generation. Allows you to build multiprocessor servers and high-performance workstations.
