Deep Convolutional Neural Network Architecture

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Motivation

massive data movements and computational complexity of DCNNs

  • performance: CPU
  • power consumption: GPU
  • fine-grained computing and routing resources still limit the power efficiency and runtime reconfiguration: FPGA

Contributions

  • a hybrid data reuse pattern for different layer sizes
  • computing resources reconfigurable: a highly scalable and efficient mapping method
  • a layer-based scheduling framework: optimization on both power efficiency and performance